Xilinx KCU105 User Manual page 89

Pci express streaming data plane trd
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Table A-1: Directory Description
Folder
readme
hardware
sources
hdl
constraints
ip_package
ui
vivado
ready to test
software
linux_driver_app
windows
PCIe Streaming Data Plane TRD
UG920 (v2017.1) June 01, 2017
A text file that includes revision history information, a detailed description of
each folder, steps to implement and simulate the design, the required
Vivado® tool software version, and known limitations of the design (if any).
Contains hardware design deliverables
Contains HDL files
Contains constraint files
Contains custom IP packages
IP Integrator (IPI) block diagram user interface file location
Contains scripts to create a Vivado® Design Suite project and outputs of
Vivado tool runs
Contains the BIT files (Base and 2x10G) to program the KCU105 PCI Express
Streaming Data Plane application
Contains software design deliverables for Linux and Windows
www.xilinx.com
Appendix A:
Description
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Directory Structure
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