Xilinx KCU105 User Manual page 83

Pre-built Modification: Adding the Ethernet Application
This section describes the pre-built modification shipped with the TRD. It describes how the
design can be modified to build a PCI Express based Ethernet design.
This design demonstrates the use of PCIe Endpoint as a dual 10G Ethernet network interface
card (NIC). This design demonstrates movement of Ethernet traffic over PCIe. Two instances
of 10GBASE-R PCS-PMA are used with two 10G MACs. This uses the SFP+ interface available
on KCU105 (Figure
X-Ref Target - Figure 5-29
Figure 5-29: PCIe-based AXIS Data Plane - 2x10G Ethernet Design
This design exercises all four DMA channels: two are used for S2C transfers and two for C2S
transfers. Each Ethernet MAC subsystem uses two DMA channels (one S2C and one C2S).
Two such instances are connected to hardware SGL Prepare blocks. Each hardware SGL
Prepare block is connected to an AXI Interconnect. The addresses get assigned as follows:
• MAC0 AXILITE - 0x44A20000
• MAC1 AXILITE - 0x44A30000
• MAC0 Datapath (Hardware SGL Prepare) - 0x4400_0000
• MAC1 Datapath (Hardware SGL Prepare) - 0x4500_0000
PCIe Streaming Data Plane TRD
UG920 (v2017.1) June 01, 2017
Chapter 5: Targeted Reference Design Details and Modifications
5-29).
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