10. The block diagram of the design can be viewed by clicking Block Diagram on the top
right corner of the GUI, adjacent to the Xilinx logo
X-Ref Target - Figure 5-27
11. Close the block diagram by clicking X in the pop-up window.
PCIe Streaming Data Plane TRD
UG920 (v2017.1) June 01, 2017
Chapter 5: Targeted Reference Design Details and Modifications
Software Components
Figure 5-27: Raw Ethernet Block Diagram View
www.xilinx.com
(Figure
5-27).
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