8. The block diagram of the design can be viewed by clicking Block Diagram on the top
right corner of the GUI, adjacent to the Xilinx logo
X-Ref Target - Figure 5-20
Software Components
9. Close the block diagram by clicking the X button of the pop-up window.
PCIe Streaming Data Plane TRD
UG920 (v2017.1) June 01, 2017
Chapter 5: Targeted Reference Design Details and Modifications
Figure 5-20: Ethernet Block Diagram View
www.xilinx.com
(Figure
5-20).
Send Feedback
UG920_c5_20_031815
74