Xilinx KCU105 User Manual page 34

Chapter 4: Implementing and Simulating the Design
X-Ref Target - Figure 4-1
UG920_c4_01_0411175
Figure 4-1: Base Design – Project View
PCIe Streaming Data Plane TRD www.xilinx.com 34
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UG920 (v2017.1) June 01, 2017