Table 26-19. Uart2 Register Summary (Register Bank 2); Table 26-20. Gpio Register Summary - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary

Table of Contents

LH75400/01/10/11 (Preliminary) User's Guide

26.16 GPIO Registers

Ports A and B Base Address: 0xFFFDF000

Ports C and D Base Address: 0xFFFDE000

Ports C and F Base Address: 0xFFFDD000

Ports G and H Base Address: 0xFFFDC000

Ports I and J Base Address: 0xFFFDB000

Table 26-19. UART2 Register Summary (Register Bank 2)

FIFO Mode Register

General Interrupt Register/Bank Register

(same register as in bank 0)

Transmit Machine Mode Register

Internal Mode Register

Address/Control Character Register 1

Interrupt Enable Register

Receive Machine Mode Register

Port I Data Register

Port J Data Register

Port I Data Direction Register

Port G Data Register

Port H Data Register

Port G Data Direction Register

Port H Data Direction Register

Port E Data Register

Port F Data Register

Port E Data Direction Register

Port F Data Direction Register

Port C Data Register

Port D Data Register

Port C Data Direction Register

Port D Data Direction Register

Port A Data Register

Port B Data Register

Port A Data Direction Register

Port B Data Direction Register