Receive Interrupt Enable Register; Table 20-59. Rie Register; Table 20-60. Rie Register Definitions - Sharp Blue Treak LH75400 User Manual

UART2

20.3.2.25 Receive Interrupt Enable Register

Register Bank: 2
RIE is the Receive Interrupt Enable Register. The RIE Register enables interrupts from the
Rx state machine. It is used to mask out interrupt requests generated by the status bits of
the RST Register (described in Section 20.3.2.17).
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:8
7
6
5
4
3
2
1
0
20-36
31 30 29 28 27
0 0 0 0
R R R R
15 14 13 12 11
///
0 0 0 0
R R R R

Table 20-60. RIE Register Definitions

/// Reserved Do not modify. Read as zero.
Control/ LAN Address Character Recognition Interrupt Enable
CRE
1 = Enables an interrupt when the CRF bit of the RST Register is set.
Programmable Control/Address Character Match Interrupt Enable
PCRE
1 = Enables an interrupt on the PCRF bit of the RST Register.
Break Termination Interrupt Enable
BKTE
1 = Enables an interrupt on the BKT bit of the RST Register.
Break Detection Interrupt Enable
BKDE
1 = Enables an interrupt on the BKD bit of the RST Register.
Framing Error Enable
FEE
1 = Enables an interrupt on the FE bit of the RST Register.
Parity Error Enable
PEE
1= Enables an interrupt on the PE bit of the RST Register.
Overrun Error Enable
OEE
1 = Enables an interrupt on the OE bit of the RST Register.
/// Reserved Read as zero.
LH75400/01/10/11 (Preliminary) User's Guide

Table 20-59. RIE Register

26 25 24 23
///
0 0 0 0 0
R R R R R
10 9 8 7
CRE
0 0 0 0 0
R R R R RW
0xFFFC2000 + 0x18
DESCRIPTION
6/17/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
FEE PEE OEE
0 0 1 1 1
RW RW RW RW RW
17 16
0 0
R R
1 0
///
1 0
RW RO