Counter Reset Register; Table 16-4. Cntr Register; Table 16-5. Cntr Register Definitions - Sharp Blue Treak LH75400 User Manual

Watchdog Timer

16.3.1.2 Counter Reset Register

CNTR is the Counter Reset Register. The active bits used in this register are Write Only.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:0
16-4
31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
0 0 0 0 0
W W W W W

Table 16-5. CNTR Register Definitions

NAME
/// Reserved Writing to these bits has no effect. Reading returns 0.
Time-out Count Down Writing 0x1984 to this register causes the counter
WDCNTR to start counting down the time-out period from the beginning and clears any
interrupts generated by the watchdog.
LH75400/01/10/11 (Preliminary) User's Guide

Table 16-4. CNTR Register

26 25 24 23
///
0 0 0 0
R R R R
10 9 8 7
WDCNTR
0 0 0 0
W W W W
0xFFFE3000 + 0x04
DESCRIPTION
6/17/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
0 0 0 0 0
W W W W W
17 16
0 0
R R
1 0
0 0
W W