Port I Data Register; Table 21-35. Pidr Register; Table 21-36. Pidr Register Definitions - Sharp Blue Treak LH75400 User Manual

General Purpose Input/Output

21.2.3.17 Port I Data Register

PIDR is the Port I Data Register. The active bits used in this register are Read/Write.
Values written to PIDR are output on the PI pins if the corresponding PIDDR Data Direction
bits are set HIGH (port output).
The values read from each bit of this register are determined by the value of the corre-
sponding bit in the Port I Data Direction Register (see Section 21.2.3.19). A read from this
register returns either:
• The last bit value written if the bit is configured as an output.
• The current value on the corresponding port input if the bit is configured as an input.
A System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
21-20

Table 21-35. PIDR Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 21-36. PIDR Register Definitions

NAME
/// Reserved Writing to these bits has no effect. Reading returns 0.
Port I Data Port I Input Data Specifies the Port I input data.
LH75400/01/10/11 (Preliminary) User's Guide
26 25 24 23 22
///
0 0 0 0
R R R R R
10 9 8 7
0 0 0 0
R R R RW RW
0xFFFDB000 + 0x00
FUNCTION
6/17/03
21 20 19 18
0 0 0 0 0
R R R R
6 5 4 3 2
Port I Data
0 0 0 0 0
RW RW RW RW
17 16
0 0
R R
1 0
0 0
RW RW