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General Purpose Input/Output
21.2.3.7 Port C Data Direction Register
PCDDR is the Port C Data Direction Register. The active bits used in this register are
Read/Write.
Bits set in the PCDDR Register set the corresponding PC pin to be an output:
• Bit [7] controls pin 32 when the pin is configured as PC7. It does not control pin 32 when
the pin is configured as A23.
• Bit [6] controls pin 33 when the pin is configured as PC6. It does not control pin 33 when
the pin is configured as A22.
• Bit [5] controls pin 35 when the pin is configured as PC5. It does not control pin 35 when
the pin is configured as A21.
• Bit [4] controls pin 36 when the pin is configured as PC4. It does not control pin 36 when
the pin is configured as A20.
• Bit [3] controls pin 37 when the pin is configured as PC3. It does not control pin 37 when
the pin is configured as A19.
• Bit [2] controls pin 38 when the pin is configured as PC2. It does not control pin 38 when
the pin is configured as A18.
• Bit [1] controls pin 39 when the pin is configured as PC1. It does not control pin 39 when
the pin is configured as A17.
• Bit [0] controls pin 40 when the pin is configured as PC0. It does not control pin 40 when
the pin is configured as A16.
Clearing a bit configures the pin to be an input. A System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
21-10
Table 21-15. PCDDR Register
31
30
29
28
27
0
0
0
0
R
R
R
R
15
14
13
12
11
///
0
0
0
0
R
R
R
R
Table 21-16. PCDDR Register Definitions
NAME
///
Reserved Writing to these bits has no effect. Reading returns 0.
Port C Output/Input
Port C Data Direction
Bits set = Port C output.
Bits cleared = Port C input.
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
0
0
0
0
0
R
R
R
R
RW
0xFFFDE000 + 0x08
6/17/03
22
21
20
19
0
0
0
0
R
R
R
R
6
5
4
3
Port C Data Direction
0
0
0
0
RW
RW
RW
RW
RW
FUNCTION
18
17
16
0
0
0
R
R
R
2
1
0
0
0
0
RW
RW
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