Timer 0 Compare Registers; Table 15-14. Cmp(N) Registers; Table 15-15. Cmp(N) Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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Timers

15.2.2.6 Timer 0 Compare Registers

There are two CMP(n) Registers for Timer 0. They are designated:
• CMP0
• CMP1
Each register is a 16-bit, read/write register. Contents of these registers are compared
continuously with the counter CNT. When both register and counter values match, a trigger
signal is generated.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
15-16

Table 15-14. CMP(n) Registers

31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
1
1
1
1
1
RW
RW
RW
RW
RW

Table 15-15. CMP(n) Register Definitions

BITS FIELD NAME
31:16
///
15:0
TM0CMP
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
///
0
0
0
0
R
R
R
R
10
9
8
7
TM0CMP
1
1
1
1
RW
RW
RW
RW
CMP0: 0xFFFC4000 + 0x14
CMP1: 0xFFFC4000 + 0x18
DESCRIPTION
Reserved Read as zero.
Timer 0 Compare 16-bit compare register value.
6/17/03
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
1
1
1
1
1
RW
RW
RW
RW
RW
17
16
0
0
R
R
1
0
1
1
RW
RW

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