Transmit Character Flag Register; Table 20-31. Txf Register; Table 20-32. Txf Register Definitions - Sharp Blue Treak LH75400 User Manual

UART2

20.3.2.11 Transmit Character Flag Register

Register Banks: 1
TXF is the Transmit Flag Register
The TXF Register holds additional components of the next character to be pushed into the
Tx FIFO. The contents of this register are pushed into the Tx FIFO with the transmit Data
Register when the CPU writes to the TxD Register.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
NOTE: The reset value of this register's bits is indeterminate.
BITS NAME
31:8
7
6
5
4:0
20-22
31 30 29 28 27
— — — — —
R R R R R
15 14 13 12 11
///
— — — — —
R R R R R

Table 20-32. TXF Register Definitions

/// Reserved Do not modify. Read as zero.
Address Marker Bit Specifies the address marker bit and is transmitted in
µLAN
µLAN Mode.
Parity Bit Specifies the parity bit for the character that is transmitted in Software
SP
Parity Mode.
D8 9th Bit of Data Specifies the 9th bit of data in a 9-bit operating mode.
/// Reserved Only write zeros to these bits.
LH75400/01/10/11 (Preliminary) User's Guide
.
The active bits used in this register are Write Only.

Table 20-31. TXF Register

26 25 24 23
///
— — — —
R R R R
10 9 8 7
— — — —
R R R W
0xFFFC2000 + 0x04
DESCRIPTION
6/17/03
22 21 20 19 18
— — — — —
R R R R R
6 5 4 3 2
SP D8 ///
— — — — —
W W W W W
17 16
— —
R R
1 0
— —
W W