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Chapter 15 - Timers
15.1 Timer Theory of Operation ........................................................................... 15-5
15.2 Timer Programmer's Model.......................................................................... 15-9
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14.3.2.3 Vertical Timing Panel Control Register......................................... 14-10
14.3.2.4 Clock and Signal Polarity Control Register................................... 14-11
14.3.2.5 Upper Panel Frame Buffer Base Address Register...................... 14-12
14.3.2.6 Lower Panel Frame Buffer Base Address Register...................... 14-13
14.3.2.7 Interrupt Enable Register.............................................................. 14-14
LCDC Control Register........................................................................... 14-15
14.3.2.9 Raw Interrupt Status Register ...................................................... 14-17
14.3.2.10 Final Masked Interrupts Register................................................ 14-18
14.3.2.12 LCD Palette Register.................................................................. 14-20
14.3.3 LCDC Interrupts .................................................................................. 14-20
15.1.1 Count Timing ......................................................................................... 15-5
15.1.2 Counter Clear Upon Compare Match .................................................... 15-6
15.1.3 Capture Signal Sampling....................................................................... 15-7
15.1.4 PWM Mode............................................................................................ 15-7
15.2.1 Timer Register Summary ...................................................................... 15-9
15.2.2 Timer Register Definitions ................................................................... 15-10
15.2.2.1 Timer 0 Control Register .............................................................. 15-10
15.2.2.2 Timer 0 Compare/Capture Control Register ................................ 15-11
15.2.2.3 Timer 0 Interrupt Control Register ................................................ 15-13
15.2.2.4 Timer 0 Status Register................................................................ 15-14
15.2.2.5 Timer 0 Counter Register ............................................................. 15-15
15.2.2.6 Timer 0 Compare Registers ......................................................... 15-16
15.2.2.7 Timer 0 Capture Registers ........................................................... 15-17
15.2.2.8 Timer 1 Control Register .............................................................. 15-18
15.2.2.9 Timer 1 Interrupt Control Register ................................................ 15-20
15.2.2.10 Timer 1 Status Register.............................................................. 15-21
15.2.2.11 Timer 1 Counter Register ........................................................... 15-22
15.2.2.12 Timer 1 Compare Registers ....................................................... 15-23
15.2.2.13 Timer 1 Capture Registers ......................................................... 15-24
15.2.2.14 Timer 2 Control Register ............................................................ 15-25
15.2.2.15 Timer 2 Interrupt Control Register .............................................. 15-27
15.2.2.16 Timer 2 Status Register.............................................................. 15-28
15.2.2.17 Timer 2 Counter Register ........................................................... 15-29
15.2.2.18 Timer 2 Compare Registers ....................................................... 15-30
15.2.2.19 Timer 2 Capture Registers ......................................................... 15-31
15.2.2.20 Timer Interrupts .......................................................................... 15-32
LH75400/01/10/11 (Preliminary) User's Guide
6/17/03
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