Gpio Programmer's Model; Gpio Registers Summary; Table 21-2. Gpio Register Summary - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

21.2.1 GPIO Programmer's Model

The base addresses for the GPIO modules are:
Ports A and B: 0xFFFDF000
Ports C and D: 0xFFFDE000
Ports E and F: 0xFFFDD000
Ports G and H: 0xFFFDC000
Ports I and J: 0xFFFDB000
The location at offset 0x0C is reserved.

21.2.2 GPIO Registers Summary

NAME
PIDR
PJDR
PIDDR
PGDR
PHDR
PGDDR
PHDDR
PEDR
PFDR
PEDDR
PFDDR
PCDR
PDDR
PCDDR
PDDDR
PADR
PBDR
PADDR
PBDDR

Table 21-2. GPIO Register Summary

ADDRESS
TYPE
OFFSET
0x00
RW
0x04 RW
0x08 RW
0x0C Reserved
0x00
RW
0x04 RW
0x08 RW
0x0C
RW
0x00 RW
0x04 RW
0x08
RW
0x0C RW
0x00 RW
0x04
RW
0x08 RW
0x0C RW
0x00
RW
0x04 RW
0x08 RW
0x0C
RW
6/17/03
General Purpose Input/Output
RESET VALUE
0x00000000 Port I Data Register
0x00000000 Port J Data Register
0x00000000 Port I Data Direction Register
Reserved
0x00000000 Port G Data Register
0x00000000 Port H Data Register
0x00000000 Port G Data Direction Register
0x00000000 Port H Data Direction Register
0x00000000 Port E Data Register
0x00000000 Port F Data Register
0x00000000 Port E Data Direction Register
0x00000000 Port F Data Direction Register
0x00000000 Port C Data Register
0x00000000 Port D Data Register
0x00000000 Port C Data Direction Register
0x00000000 Port D Data Direction Register
0x00000000 Port A Data Register
0x00000000 Port B Data Register
0x00000000 Port A Data Direction Register
0x00000000 Port B Data Direction Register
DESCRIPTION
21-3