LH75400/01/10/11 (Preliminary) User's Guide
20.3.2.28 BRGA Configuration Register
Register Bank: 3
BACF is the BRGA Configuration Register. The BACF Register defines the BRGA clock
sources and operating mode.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:3
2
1:0
Table 20-65. BACF Register
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
0
0
0
0
0
R
R
R
R
R
Table 20-66. BACF Register Definitions
///
Reserved Do not modify. Read as zero.
BRGA Mode of Operation Selects between the Timer Mode or the Baud
Range Generator Mode.
BAM
0 = Timer Mode; input clock source is always the system clock.
1 = Baud Rate Generator Mode.
///
Reserved Read as zero.
26
25
24
23
22
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
6
///
0
0
0
0
0
R
R
R
R
R
0xFFFC2000 + 0x04
DESCRIPTION
6/17/03
UART2
21
20
19
18
17
0
0
0
0
0
R
R
R
R
R
5
4
3
2
1
BAM
0
0
0
1
0
R
R
R
RW
R
16
0
R
0
///
0
R
20-39