Fifo Status Register; Table 23-20. Fs Register; Table 23-21. Fs Register Definitions - Sharp Blue Treak LH75400 User Manual

Analog-to-Digital Converter/Brownout Detector

23.3.2.10 FIFO Status Register

FS is the FIFO Status Register. This Read Only register indicates the FIFO fill status.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:12
11:8
7:4
3
2
1
0
23-20
31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 23-21. FS Register Definitions

NAME
/// Reserved Read as zero.
Write Pointer FIFO Location Current FIFO location where the
WRPTR
write pointer is pointing.
Read Pointer FIFO Location Current FIFO location where the
RSPTR
read pointer is pointing.
FIFO Full
FFF
0 = FIFO is not full.
1 = FIFO is full.
FIFO Empty
FEMPTY
0 = FIFO is not empty.
1 = FIFO is empty.
FIFO Overrun Status Bit Set when the receive logic tries to
place data into the FIFO after it has been completely filled. When a
new piece of data is received, the FOVRN bit is asserted and the
newly received data is discarded. This process repeats for each
new piece of data received, until at least one empty FIFO entry ex-
FOVRNDET
ists. When FOVRN is set, an interrupt request is generated.
0 = FIFO has not experienced an overrun.
1 = Logic tried to place data into a full receive FIFO and is
FIFO at Watermark
FGTEWATERMRK
0 = FIFO has fewer entries than watermark level.
1 = FIFO is at or above watermark level.
LH75400/01/10/11 (Preliminary) User's Guide

Table 23-20. FS Register

26 25 24 23
///
0 0 0 0
R R R R
10 9 8 7
WRPTR
0 0 0 0
R R R R
0xFFFC3000 + 0x20
DESCRIPTION
requesting an interrupt.
6/25/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
RDPTR FFF
0 0 0 0 1
R R R R R
17 16
0 0
R R
1 0
0 0
R R