Hclk Prescaler Register; Chapter 9 - Reset, Clock, And Power Controller; Table 9-15. Sysclk Prescaler Register; Table 9-16. Sysclk Prescaler Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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Reset, Clock, and Power Controller

9.3.2.7 HCLK Prescaler Register

SysClkPrescaler is the HCLK Prescaler Register. This register is a 4-bit value that
holds the prescale count for the HCLK prescaler. The active bits used in this register
are Read/Write.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS FIELD NAME
31:4
3:0
9-12

Table 9-15. SysClk Prescaler Register

31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
0
0
0
0
0
R
R
R
R
R

Table 9-16. SysClk Prescaler Register Definitions

///
Reserved Writing to these bits has no effect.
HCLK Prescaler Prescale Count Shows the prescale count for the
HCLK prescaler. See Table 9-17 for valid values for SysClkPrescaler and
HCLK
the corresponding internal clock frequencies. All other SysClkPrescaler
values are invalid and ignored.

Table 9-17. SysClkPrescaler Register Values

SYSCLKPRESCALER
0001
0010
0011
0100
:
1111
NOTE: System clock = (XTALIN frequency × 7)/(2 × SysClkPrescaler).
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
22
///
0
0
0
0
R
R
R
R
R
10
9
8
7
///
0
0
0
0
R
R
R
R
R
0xFFFE2000 + 0x18
DESCRIPTION
DIVIDER VALUE
2
4
6
8
:
30
7/15/03
21
20
19
18
0
0
0
0
0
R
R
R
R
6
5
4
3
2
HCLK
0
0
0
1
1
R
R
RW
RW
ƒ(HCLK)
ƒ(source clock)/2
ƒ(source clock)/4
ƒ(source clock)/6
ƒ(source clock)/8
:
ƒ(source clock)/30
17
16
0
0
R
R
1
0
1
1
RW
RW

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