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Chapter 13
Color Liquid Crystal
Display Controller
The Color Liquid Crystal Display (LCD) Controller information in this section pertains to the
LH75401 and LH75411 SoC devices only.
The Color LCD Controller (CLCDC) is an AMBA master-slave module that connects to
the AHB. The CLCDC translates pixel-coded data into the required formats and timings to
drive single/dual monochrome and color LCD panels. The CLCDC supports passive
Super Twisted Nematic (STN), active Thin Film Transistor (TFT), High Reflective TFT
(HR-TFT), and Advanced TFT (AD-TFT) LCD displays.
Packets of pixel-coded data are fed, via the AHB interface, to two independently program-
mable, 32-bit-wide DMA FIFOs. Each FIFO is 16 words deep by 32 bits wide. In Single
Panel STN Mode, the LCD DMA FIFOs are made to appear as a single FIFO of twice the
size. The buffered pixel-coded data is then unpacked via a pixel serializer.
In 12-bit-per-pixel Mode, the CLCDC uses the unpacked data directly to generate the pixel
value. In all other bit-per-pixel modes, the CLCDC uses the unpacked data to index its pal-
ette RAM; the CLCDC uses the value indexed from the palette to generate the pixel value.
For STN displays, this value passes to the gray-scaling generator. For TFT displays, this
value bypasses the gray-scaling generator and passes directly to the output display drivers.
The CLCDC generates a single combined interrupt to the VIC when an individual interrupt
condition becomes true for upper/lower panel DMA FIFO underflow, base address update
signification, vertical compare, or bus error.
7/15/03
13-1
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