Iocon Registers; Dma Controller Registers; Table 26-4. Iocon Register Summary; Table 26-5. Dma Controller Register Summary - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

26.4 IOCON Registers

Base address: 0xFFFE5000
NAME
EBI_MUX
PD_MUX
PE_MUX
TIMER_MUX
LCD_MUX
PA_RES_MUX
PB_RES_MUX
PC_RES_MUX
PD_RES_MUX
PE_RES_MUX
ADC_MUX
NOTE: The reset value of the EBI Interface Muxing Register is based on whether the system is booted in 16-

26.5 DMA Controller Registers

Base address: 0xFFFE1000

Table 26-4. IOCON Register Summary

ADDRESS
TYPE
OFFSET
0x00 RW
0x04 RW
0x08 RW
0x0C RW
0x10 RW
0x14 RW
0x18 RW
0x1C RW
0x20 RW
0x24 RW
0x28 RW
bit or 8-bit Mode. In 16-bit Mode, the reset value is 0x4000. During 8-bit Mode, the reset value is 0x0000.

Table 26-5. DMA Controller Register Summary

NAME ADRESS OFFSET TYPE
Stream0 0x000
Stream1 0x040
Stream2 0x080
Stream3 0x0C0
Mask 0x0F0
Clr 0x0F4
Status 0x0F8
RESET
VALUE
See Note EBI Interface Muxing Register
0x0000 Pins PD6/INT6 to PD0/INT0 Muxing Register
0x0000 Pins PE7/SSPRM to PE0/UARTRX2 Muxing Register
0x0000 Timer Muxing Register
0x0000 LCD Mode Muxing Register
0xAAAA Pins PA7/D15 to PA0/D8 Resistor Muxing Register
0x0555 Pins PB5/nWAIT to PB0/nCS1 Resistor Muxing Register
0x0000 Pins PC7/A23 to PC0/A16 Resistor Muxing Register
0x095A Pins PD6/INT6 to PD0/INT0 Resistor Muxing Register
Pins PE7/SSPRM to PE0/UARTRX2 Resistor
0x4455
Muxing Register
0x0000 Pins AN3/PJ7 to AN0/PJ0 Muxing Register
RW Data Stream0 Register Base
R W Data Stream1 Register Base
RW Data Stream2 Register Base
RW Data Stream3 Register Base
RW DMA Interrupt Mask Register
W DMA Interrupt Clear
R DMA Status Register
6/17/03
Register Map
DESCRIPTION
DESCRIPTION
26-5