Raw Interrupt Status Register; Table 10-7. Rawintr Register; Table 10-8. Rawintr Register Definitions - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

10.2.2.3 Raw Interrupt Status Register

RawIntr is the Raw Interrupt Status Register. This Read Only register provides the status
of the source interrupts (and software interrupts) to the Interrupt Controller.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:0

Table 10-7. RawIntr Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
0 0 0 0 0
R R R R R

Table 10-8. RawIntr Register Definitions

NAME
Interrupt Status After Masking Shows the status of the interrupts be-
fore masking by the Enable Registers.
0 = Appropriate interrupt request is not active before masking.
RawInterrupt
1 = Appropriate interrupt request is active before masking.
Bits [31:0] correspond to the interrupt order in the Interrupt Assignments
Table (see Table 10-1).
26 25 24 23 22
RawInterrupt
0 0 0 0 0
R R R R R
10 9 8 7 6
RawInterrupt
0 0 0 0 0
R R R R R
0x008
0xFFFFF000 +
DESCRIPTION
6/17/03
Vectored Interrupt Controller
21 20 19 18
0 0 0 0
R R R R
5 4 3 2
0 0 0 0
R R R R
17 16
0 0
R R
1 0
0 0
R R
10-11