And Dcc Limitations; Ons 15310-Cl Or Ons 15310-Ma Switches Timing Reference; Table 1-23 Circuit Creation Error With Vt1.5 Circuit; Table 1-24 Oc-3 And Dcc Limitations - Cisco ONS 15310-CL Troubleshooting Manual

1.10.5 OC-3 and DCC Limitations
Table 1-23
Possible Problem
You might have run out
of bandwidth on the VT
cross-connect matrix at
the node indicated in the
error message.
1.10.5 OC-3 and DCC Limitations
Symptom
Table 1-24
Table 1-24
Possible Problem
OC-3 and DCC have
limitations for the
system.

1.10.6 ONS 15310-CL or ONS 15310-MA Switches Timing Reference

Symptom
Table 1-25
Table 1-25
Possible Problem
The optical or building integrated timing supply
(BITS) input is receiving loss of signal (LOS), loss of
frame (LOF), or AIS alarms from its timing source.
The optical or BITS input is not functioning.
Synchronization status message (SSM) is set to Don't
Use for Synchronization (DUS).
SSM indicates a Stratum 3 or lower clock quality.
The input frequency is off by more than 15 ppm.
The input clock wanders and has more than three slips
in 30 seconds.
A bad timing reference existed for at least two
minutes.
Cisco ONS 15310-CL and Cisco ONS 15310-MA Troubleshooting Guide, R7.0
1-64
Circuit Creation Error with VT1.5 Circuit
Solution
The ONS 15310-CL matrix has a maximum capacity of 336 bidirectional
VT1.5 cross-connects. The ONS 15310-MA capacity is 1,064.
There are limitations to OC-3 and DCC usage.
describes the potential cause of the symptom and the solution.
OC-3 and DCC Limitations
Solution
For an explanation of OC-3 and DCC limitations, refer to the "DCC
Tunnels" section in the Cisco ONS 15310-CL and Cisco ONS 15310-MA
Procedure Guide.
Timing references switch when one or more problems occur.
describes the potential causes of the symptom and the solutions.
ONS 15310-CL or ONS 15310-MA Switches Timing Reference
Chapter 1
Solution
The node internal clock operates at a
Stratum 3 level of accuracy. This gives the
node a free-running synchronization accuracy
of +/–4.6 ppm and a holdover stability of less
than 255 slips in the first 24 hours or 3.7 x
–7
10 per day, including temperature.
Node free-running synchronization relies on
the Stratum 3 internal clock.
Use a higher quality Stratum 1 or Stratum 2
timing source. This results in fewer timing
slips than a lower quality Stratum 3 timing
source.
General Troubleshooting
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