Registers To Check Reset Source - NEC V850E/RS1 User Manual

19.2 Registers to Check Reset Source

(1) Reset source flag register (RESF)
The RESF register indicates from which source a reset signal has been generated.
This register is read-only, in 8-bit units.
RESET input/POC reset clears this register to 00H. The default value differs if reset is effected
from a source other than RESET.
Symbol
RESF
R/W
Note: The value of this register is cleared to 00H when an external reset is executed via the RESET
Caution:
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Figure 19-1: Reset Source Flag Register (RESF) Format
7 6 5
0 0 0
R R R
WDT2RF
0 Internal reset request has not occurred, or RESF is cleared.
1 Internal reset request has occurred.
CLMRF
0 Internal reset request has not occurred, or RESF is cleared.
1 Internal reset request has occurred.
LVIRF
0 Internal reset request has not occurred, or RESF is cleared.
1 Internal reset request has occurred.
pin or when the Power on Clear occurred. When a reset is executed by the WDT2RES signal,
low-voltage detector (LVI), or clock monitor (CLM), the reset flag of the corresponding register
(WDT2RF bit, CLMRF bit, and LVIRF bit) is set to 1 (the other sources are held).
Only 0 can be written to each bit. If writing 0 and flag setting (occurrence of reset)
conflict, flag setting takes precedence.
Chapter 19 RESET Function
4 3 2
WDT2RF 0 0 CLMRF LVIRF
R/W R R
Generation of reset signal from WDT2
Generation of reset signal from CLM
Generation of reset signal from LVI
User's Manual U16702EE3V2UD00
1 0 Address After reset
FFFFF888H
R R/W
00H