NEC V850E/RS1 User Manual page 502

(12) FIFO Buffer Transfer Mode (Slave Mode, Transmit/Receive Mode)
MSB first (DIR = 0), no INTC3nI delay (CSIT = 0), transmission wait disabled (CSWE = 0), CS
inactive disabled (CSMD = 0), CKP = 0, DAP = 1, transmission data length of 8 bits
(CCL[3:0] = [1,0,0,0]), active levels of all chip selects set to "active low":
CTXE, CRXE
SFDB write
CSIBUF-empty
CSIBUF_0
CSIBUF_1
CSIBUF_2
CSIBUF_2
SCK3 (input)
CS3n[3:0]
INTC3nI
SIRB read
1. Set the CSIM register's POWER bit to 1 to enable the supply of the Queued CSI operation clock.
2. Set the CSIC and CSIL registers to specify the transfer mode.
3. Write "1" in the SFA register's FPCLR bit to clear all FIFO pointers.
4. Specify the transfer mode using the CSIM register's TRMD, DIR, and CSIT bits; at the same time,
set the CTXE and CRXE bits to 1 to enable the transmit/receive operation.
5. Set the number of transmit/receive data items in the SFN register's SFN[3:0] bits.
6. Make sure that the SFA register's SFFUL bit is set to 0, then write transmission data in the SFDB
register. (In the slave mode, there is no need to set data in the SFCS register, as the chip select
pins CS3n[3:0] are not used.)
7. Wait for the transmissions/receptions to be completed (e.g. by monitoring the INT3C3nI interrupt).
8. Read the received data by multiple read of the SIRB register (= sequential read from the FIFO).
9. Write "1" in the SFA register's FPCLR bit and clear all FIFO pointers for the next transmission.
To continue transmission, repeat steps (5) - (9).
10. Set the CSIM register's CTXE and CRXE bits to 0 to disable the transmit/receive operation (end of
transmit/receive operation).
502
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Chapter 14 Queued CSI (CSI30, CSI31)
Figure 14-36: FIFO Buffer Transfer Mode (Slave, Transmit/Receive) Timing
55H
SO3
0 1 0 1 0
SI3
1 1 0 0 1 1
"inactive level"
CSOT
SFN3-0 3H
SFP3-0 0H
(1) (2)(3)
(5)
(6)
(4)
(6)
CCH
96H
AAH
1 0 1 1 0 1 0 1 0 1 0
0 0 1 0 0 1 0 1 1 0
1H 2H
Wait insertion
by CSIBUF-empty
User's Manual U16702EE3V2UD00
33H 99H
0 0 0
0 1 1 1 1
0 0
1 0 0 1 1 1
3H
(8) (8)
(6)
(7) (8) (9)
0H
(10)