Uartan Timing - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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SCKBn (I/O)
Remarks: 1. Broken line indicates high impedance.

27.8.9 UARTAn timing

Baud rate
ASCK0 frequency
Remark:
816
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Chapter 27 Electrical Specification
Figure 27-10: CSIBn Timing (CBnCKP=0, CBnDAP=0)
SIBn
SOBn
2. "x" stands for either "M" (master mode) or "S" (slave mode)
Parameter
n = 0, 1
t
KCYx
t
t
KWLx
KWHx
t
t
HSIx
SSIx
Input data
t
DSOx
t
HSOx
Output
Symbol
Conditions
User's Manual U16702EE3V2UD00
MIN.
MAX.
Unit
-
312.5
kbps
-
10
MHz

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