Control Registers; Dma Source Address Registers 0 To 3 (Dsa0 To Dsa3) - NEC V850ES/SA2 UPD703201 Manual

13.3 Control Registers

13.3.1 DMA source address registers 0 to 3 (DSA0 to DSA3)

These registers are used to set the DMA source addresses (28 bits each) for DMA channel n (n = 0 to 3). They
are divided into two 16-bit registers, DSAnH and DSAnL.
(1) DMA source address registers 0H to 3H (DSA0H to DSA3H)
These registers can be read or written in 16-bit units.
After reset:
DSAnH
(n = 0 to 3)
(2) DMA source address registers 0L to 3L (DSA0L to DSA3L)
These registers can be read or written in 16-bit units.
After reset:
DSAnL
(n = 0 to 3)
CHAPTER 13 DMA FUNCTIONS (DMA CONTROLLER)
Undefined R/W Address:
15 14 13
IR 0 0
7 6 5
SA23 SA22 SA21
IR
0
External memory, on-chip peripheral I/O
1 Internal RAM
SA25 to Set the DMA source addresses (A25 to A16). During DMA transfer, they
SA16
store the next DMA transfer source address.
Undefined R/W Address:
15 14 13
SA15 SA14 SA13
7 6 5
SA7 SA6 SA5
SA15 to Set the DMA source addresses (A15 to A0). During DMA transfer, they
SA0
store the next DMA transfer source address.
Preliminary User's Manual U15905EJ1V0UD
DSA0H: FFFFF082H, DSA1H: FFFFF08AH,
DSA2H: FFFFF092H, DSA3H: FFFFF09AH
12 11 10
0 0 0
4 3 2
SA20 SA19 SA18
DMA source address specification
DSA0L: FFFFF080H, DSA1L: FFFFF088H,
DSA2L: FFFFF090H, DSA3L: FFFFF098H
12 11 10
SA12 SA11 SA10
4 3 2
SA4 SA3 SA2
9 8
SA25 SA24
1 0
SA17 SA16
9 8
SA9 SA8
1 0
SA1 SA0
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