Registers Controlling Low-Voltage Detector - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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24.3 Registers Controlling Low-Voltage Detector

The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Low-voltage detection level selection register (LVIS)
(1)
Low-voltage detection register (LVIM)
The LVIM register is a special register (see 3.2.3 "Special registers" on page 70). It is used to
enable or disable low-voltage detection and sets the operation mode of the low-voltage detector.
This register can be read or written 1-bit or 8-bit units.
Reset input clears this register to 00H.
Symbol
LVIM
R/W
LVION
LVIMD
Cautions: 1. LVION and LVIMD are cleared to 0 at a reset other than an LVI reset. These are not
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Chapter 24 Low-Voltage Detector
Figure 24-2: Low-Voltage Detection Register (LVIM) Format
7
6
5
LVION
0
0
R/W
R
R
Enables or disables low-voltage detection operation
0
Disables operation
1
Enables operation
Generates interrupt request signal INTLVI when supply voltage (V
0
tion (V
)
LVI
Generates internal reset signal LVIRES when supply voltage (V
1
(V
)
LVI
LVIF
When supply voltage (V
0
When supply voltage (V
1
cleared to 0 at an LVI reset.
2. After setting the LVION bit to 1, wait for 0.1ms (TYP) (target value) before
checking the voltage using the LVIF bit.
3.
The value of LVIF flag is output as the interrupt request signal INTLVI when LVION
bit = 1 and LVIMD bit = 0.
4. The LVIF bit is read-only. Be sure to clear bits 2 to 6 to 0
5. To stop LVI, when using 8-bit manipulation instruction: Write 00H to LVIM.
4
3
2
0
0
0
LVIMD
R
R
R
R/W
Low-voltage detection operation mode selection
Low-voltage detection flag
) > detection voltage (V
), or when operation is disabled
DD
LVI
) < detection voltage (V
)
DD
LVI
User's Manual U16702EE3V2UD00
1
0
Address
After reset
LVIF
FFFFF890H
R
) < low-voltage detec-
DD
) < low-voltage detection
DD
00H

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