Dedicated Baud Rate Generator - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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12.6 Dedicated Baud Rate Generator

The dedicated baud rate generator consists of a source clock selector and 8-bit programmable
counters, and generates a serial clock for transmission/reception by UARTAn. The output of the dedi-
cated baud rate generator can be selected as the serial clock on a channel by channel basis.
8-bit counters are provided separately for transmission and reception.
(1)
Configuration of baud rate generator
Remarks: 1. n = 0 to 1
(a) Base clock
The clock selected by the UAnCKS3 to UAnCKS0 bits of the UAnCTL1 register is supplied to the
8-bit counter when the UAnPWR bit of the UAnCTL0 register is 1. This clock is called the base
clock, and its frequency is called f
low level.
(b) Generation of serial clock
A serial clock can be generated in accordance with the setting of the UAnCTL1 and UAnCTL2 reg-
isters (n = 0 to 1).
The base clock is selected by using the UAnCKS3 to UAnCKS0 bits of the UAnCTL1 register.
The division ratio of the 8-bit counter can be selected by using the UAnBRS7 to UAnBRS0 bits of
the UAnCTL2 register.
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Chapter 12 Asynchronous Serial Interface A (UARTA)
Figure 12-16: Configuration of Baud Rate Generator
UAnPWR
f
XX
f
/2
XX
f
/4
XX
f
/8
XX
f
/16
XX
f
/32
XX
Selector
f
/64
XX
f
/128
XX
f
/256
XX
f
/512
XX
f
/1024
XX
ASCKAn
UAnCTL1:
UAnCKS3 to UAnCKS0
2. f
: Internal system clock
XX
User's Manual U16702EE3V2UD00
UAnPWR, UAnTXEn (or UAnRXE)
Clock
8-bit counter
(f
)
XCLK
Match detector
UAnCTL2:
UAnBRS7 to UAnBRS0
. When the UAnPWR bit is 0, the base clock is fixed to the
XCLK
1/2
Baud rate
425

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