Programmable I/O Area; Programmable Peripheral I/O Control Register (Bpc) - NEC V850E/RS1 User Manual

32-/16-bit single-chip microcontroller with can interface
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3.5 Programmable I/O Area

The V850E/RS1 includes an additional memory area for the control of on-chip peripherals. The base
address of this area is located in the external memory space.
A control register setting is required to enable this additional memory.
Control registers for the following on-chip peripherals are implemented in the Programmable I/O area.
• CAN

3.5.1 Programmable peripheral I/O control register (BPC)

This 16-bit register specifies selection of the Programmable I/O area.
The BPC register can be read or written only in 16-bit units.
RESET input clears BPC to 0000H.
To use the CAN built-in interfaces, set PA15 to 1 by writing the BPC register with a 16-bit memory
manipulation instruction.
To disable access to the CAN RAM and CAN registers, clear PA15 to 0 by writing 0000H to the
BPC register with a 16-bit memory manipulation instruction.
The mapping of the CAN RAM and registers can be shown in section 3.4.4 "Memory map" on
page 78.
For example, if BPC = 0x8FFB, the programmable area is set to 3FEC000H.
Symbol
BPC
R/W
Bit position
Caution:
Remark:
92
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Figure 3-30: Programmable Peripheral I/O Control Register (BPC) Format
15
14
13
PA15
0
PA13
R/W
R/W
R/W
7
6
5
PA07
PA06
PA05
R/W
R/W
R/W
Bit name
Enables/disables usage of programmable peripheral I/O area
PA15
15
PA15
0
1
PA13 to
Specify an address in programmable peripheral I/O area
0
PA00
(correspond to A27 to A14 respectively)
When using the CAN controller (PA15 = 1), be sure to set 8FFBH to this register.
When not using the CAN controller (PA15 = 0), be sure to set 0000H to this register.
The programmable peripheral I/O area is fixed by hardware in the V850E core
in 3FEC000H to 3FEEFFFH. However, be sure to set 8FFBH to this register when
using the CAN controller because it is possible to write it in bit 13 to bit 0 of this register in
tool (ICE).
Chapter 3 CPU Function
12
11
10
PA12
PA11
PA10
PA09
R/W
R/W
R/W
R/W
4
3
2
PA04
PA03
PA02
PA01
R/W
R/W
R/W
R/W
Function
Usage of programmable peripheral I/O area
Usage of programmable peripheral I/O area is disabled
Usage of programmable peripheral I/O area is enabled
User's Manual U16702EE3V2UD00
9
8
Address
PA08
FFFFF064H
R/W
1
0
PA00
R/W
After reset
0000H

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