NEC V850E/RS1 User Manual page 292

Timer operation enable
(TPnCE = 1)
→
Transfer of TPnCCR0
and TPnCCR1 values
to CCR0 buffer register
CCR0 and CCR1 buffer
registers respectively
Match between CCR1 buffer
register and 16-bit counter
Match between CCR0 buffer
register and 16-bit counter
16-bit counter overflow
Remark:
292
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Chapter 7 16-Bit Timer/Event Counter P
Figure 7-27: Flowchart of Basic Operation in Free-Running Mode
•
Clock selection
(TPnCTL0: TPnCKS2 to TPnCKS0)
•
Free-running mode setting
(TPnCTL1: TPnMD2 to TPnMD0 = 101)
TPnCCS1 = 0
TPnCCS0 = 0
TIPn0 edge detection setting
(TPnIS1, TPnIS0)
Timer operation enable
(TPnCE = 1)
→
Transfer of TPnCCR1
value to CCR1 buffer
register
Match between CCR1 buffer
register and 16-bit counter
TIPn0 edge detection,
capture of 16-bit counter
value to TPnCCR0
16-bit counter overflow
n = 0 to 3
User's Manual U16702EE3V2UD00
START
Initial settings
TPnCCS1, TPnCCS0 setting
TPnCCS1 = 0 TPnCCS1 = 1
TPnCCS0 = 1 TPnCCS0 = 0
TIPn1 edge detection setting
(TPnIS3, TPnIS2)
Timer operation enable
(TPnCE = 1)
→
Transfer of TPnCCR0
value to CCR0 buffer
register
TIPn1 edge detection,
capture of 16-bit counter
value to TPnCCR1
Match between CCR0 buffer
register and 16-bit counter
16-bit counter overflow
TPnCCS1 = 1
TPnCCS0 = 1
TIPn1, TIPn0 edge detection
setting (TPnIS3 to TPnIS0)
Timer operation enable
(TPnCE = 1)
TIPn1 edge detection,
capture of 16-bit counter
value to TPnCCR1
TIPn0 edge detection,
capture of 16-bit counter
value to TPnCCR0
16-bit counter overflow