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(1)
External interrupt falling edge specification register 0 (INTF0)
This is an 8-bit register that specifies detection of the falling edge of the external interrupt pins.
This register can be read or written in 8-bit or 1-bit units.
Caution:
Figure 17-15: External Interrupt Falling Edge Specification Register 0 (INTF0) Format
Remark:
(2)
External interrupt rising edge specification register 0 (INTR0)
This is an 8-bit register that specifies detection of the rising edge of the external interrupt pins.
This register can be read or written in 8-bit or 1-bit units.
Caution:
Figure 17-16: External Interrupt Rising Edge Specification Register 0 (INTR0) Format
Remark:
Caution:
Remark:
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Chapter 17 Interrupt/Exception Processing Function
When the function is changed from the external interrupt function (alternate function)
to the port function, an edge may be detected. Therefore, clear INTF0n and INTR0n to
0, and then set the port mode.
After reset: 00H
7
6
INTF0
0
INTF06
For how to specify a valid edge, refer to Table 17-4.
When the function is changed from the external interrupt function (alternate function)
to the port function, an edge may be detected. Therefore, clear INTF0n and INTR0n to
0, and then set the port mode.
After reset: 00H
7
6
INTR0
0
INTR06
For how to specify a valid edge, refer to Table 17-4.
Table 17-4: Valid Edge Specification
INTF0n
INTR0n
0
0
No edge detected
0
1
Rising edge
1
0
Falling edge
1
1
Both edges
Be sure to set INTF0n and INTR0n to 00 when these terminals are not used as
external interrupt function.
n = 5: Control of INTP2
n = 6: Control of INTP3
User's Manual U16702EE3V2UD00
R/W
Address: FFFFFC00H
5
4
3
INTF05
0
0
R/W
Address: FFFFFC20H
5
4
3
INTR05
0
0
Valid Edge Specification (n = 5, 6)
2
1
0
0
0
0
2
1
0
0
0
0
709
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