Configuration Of Function Block; Internal Block Diagram - NEC V850E/RS1 User Manual

1.6 Configuration of Function Block

1.6.1 Internal block diagram

INTP0 to INTP7
TIP00 to TIP31
TOP00 to TOP31
TIQ00 to TIQ13
TOQ00 to TOQ13
Note: External bus interface is available only for 3403 and 3403A
Downloaded from Elcodis.com electronic components distributor
Figure 1-2: Internal Block Diagram
Flash ROM
NMI
INTC
Timer
×
TMP 4-ch
(16-bit timer)
×
TMQ 2-ch
(16-bit timer)
×
TMM 1-ch
(16-bit timer)
Serial Interface
SOB0
SIB0 CSIB0
SCKB0
BRG0
SOB1
SIB1 CSIB1
SCKB1
TXDA0
UARTA0
RXDA0
BRG
ASCKA0
TXDA1
UART1
RXDA1
BRG
ASCKA1
SO30
SI30
SCK30 CSI30
CS300 to
CS303
SO31
SI31
SCK31 CSI31
CS310 to
CS313
CTXD0
aFCAN0
CRXD0
CTXD1
aFCAN1
CRXD1
User's Manual U16702EE3V2UD00
Chapter 1 Introduction
CPU
128 KB/
PC
256 KB
32-bit barrel
Multiplier
RAM
32 × 32 → 64
shifter
10 KB/
System
16 KB
registers
ALU
General-
purpose register
DMAC
32 bits × 32
6-ch
Ports
Ring-OSC
Watchdog
timer 2
ANI0 to ANI15
A/D
ADTRG
converter
AV
REF0
AV
SS
RCU
DRST
DMS
RSU
DDI
DCK
DDO
On-chip debug function
Note
Instruction CS0, CS1
queue
AD0 to AD15
Note
WR0, WR1
Note
HLDRQ
MEMC
Note
HLDAK
ASTB Note
BCU Note
RD
WAIT Note
Note
CLKOUT
CG
PCL
PLL0
X1
PLL1
X2
RG RESET
FLMD0
System
control
FLMD1
Clock monitor
POC/LVI
V
DD0
Regulator0
V
SS0
REGC0
V
DD1
Regulator1 V
SS1
REGC1
BV
DD
BV
SS
Note
35