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10.2 Configuration
Watchdog Timer 2 consists of the following hardware.
10.3 Control Registers
(1)
Oscillation stabilization time select register (OSTS)
The OSTS register selects the oscillation stabilization time following reset or release of the stop
mode.
This register is set by an 8-bit manipulation instruction.
RESET input sets this register to 03H.
Symbol
OSTS
R/W
OSTS2
Notes: 1. The oscillation stabilization time and setup time are required when the software stop mode
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Chapter 10 Functions of Watchdog Timer 2
Table 10-1: Configuration of Watchdog Timer 2
Item
Oscillation stabilization time select register (OSTS)
Control registers
Watchdog timer mode register 2 (WDTM2)
Watchdog timer enable register (WDTE)
Figure 10-2: Oscillation Stabilization Time Select Register (OSTS) Format
7
6
5
0
0
0
R/W
R/W
R/W
OSTS1
OSTS0
Selected clock
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Setting prohibited
and idle mode are released, respectively.
2. f
: Main clock oscillator frequency
X
Configuration
4
3
2
0
0
OSTS2 OSTS1 OSTS0
R/W
R/W
R/W
R/W
Selection of oscillation stabilization time/setup time
10
2
/f
X
11
2
/f
X
12
2
/f
X
13
2
/f
X
14
2
/f
X
15
2
/f
X
16
2
/f
X
User's Manual U16702EE3V2UD00
1
0
Address
FFFFF6C0H
R/W
Note 1
Note 2
f
X
8 MHz
0.128 ms
0.256 ms
0.512 ms
1.024 ms
2.048 ms
4.096 ms
8.192 ms
After reset
03H
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