NEC V850E/RS1 User Manual page 549

32-/16-bit single-chip microcontroller with can interface
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(3)
Synchronizing data bit
• The receiving node establishes synchronization by a level change on the bus because it does
• The transmitting node transmits data in synchronization with the bit timing of the transmitting
(a) Hardware synchronization
This synchronization is established when the receiving node detects the start of frame in the inter-
frame space.
• When a falling edge is detected on the bus, that TQ means the sync segment and the next
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Chapter 16 FCAN Controller
not have a sync signal.
node.
segment is the prop segment. In this case, synchronization is established regardless of SJW.
Figure 16-20: Adjusting Synchronization of Data Bit
Interframe space
CAN bus
Sync
Bit timing
segment
User's Manual U16702EE3V2UD00
Start of frame
Phase
Prop
Phase
segment 1
segment
segment 2
549

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