Sony CXD5602 User Manual page 78

3.1.4.3.18 I2C3
If the pin SYSTEM0 is Low and the pin SYSTEM1 is Low when POR is released, pin P00_{00,01} are assigned
I2C role automatically. For this reason, usually I2C3 role cannot be set by registers.
The following are settings to release roles assigned automatically by pin SYSTEM0 and pin SYSTEM1, and to
newly assign pin P00_{00,01} I2C role for debugging.

DBG_HOSTIF_SEL.LATCH_OFF=1

IO_SPI2_CS_X.ENZI=1

IO_SPI2_SCK.ENZI=1

IOCSYS_IOMD0.SPI2A=3
3.1.4.3.19 HIF_IRQ_OUT
The following is a setting that pin P02_00 is assigned HIF_IRQ_OUT role.

IOCSYS_IOMD0.HIFIRQ=1
3.1.4.3.20 HIF_IRQ_OUT (Open Drain)
The following is a setting that pin P02_00 is assigned HIF_IRQ_OUT role. The pin becomes to operate as Open
Drain and outputs in negative logic.

IOCSYS_IOMD0.HIFIRQ=2
3.1.4.3.21 GPS_EXTLD
The following are settings that pin P03_00 is assigned GPS_EXTLD role.

IO_HIF_GPIO0.ENZI=1

IOCSYS_IOMD0.HIFEXT=3
3.1.4.3.22 SEN_IRQ_IN
The following are settings that pin P1e_00 is assigned SEN_IRQ_IN role.

IO_SEN_IRQ_IN.ENZI=1

IOCSYS_IOMD1.SEN_IRQ_IN=1
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CXD5602 User Manual