Sony CXD5602 User Manual page 113

Interrupt request from Wathdog Timer, WDTINT (bit[20]) is connected to IRQ of Processor 0, and reset signal
from Watchdog Timer, WDTRES (bit[21]) is connected to Non-Maskable Interrupt (NMI) of Processor 0 (PID0
in Figure Interrupt-25).
WDTRES (bit[23]) of GNSS and WDTRES (bit[23]) of APP are ORed with WDTINT(bit[20]), and the result is
provided to NMI of Processor 0. In the meantime, WDTRESOUT (bit[22]) is not connected to IRQ or NMI of
Processor 0, but connected to System Reset of CRG, therefore, System Reset can be performed regardless of the
status of Processor 0.
3.3.2 Register Descriptions
3.3.2.1 Interrupt Registers of Application Processor
Table Interrupt-32 shows list of interrupt registers of Application Processor.
Table Interrupt-32 List of Interrupt Registers of Application Processor
Address Register
0xE0045000 INT_CAUSE0
0xE0045004 INT_CAUSE1
0xE0045008 INT_CAUSE2
0xE004500C INT_CAUSE3
0xE0045010 INT_EN0
0xE0045014 INT_EN1
0xE0045018 INT_EN2
0xE004501C INT_EN3
0xE0045020 INT_INV0
0xE0045024 INT_INV1
0xE0045028 INT_INV2
0xE004502C INT_INV3
0xE0045030 INT_IRQ0
0xE0045034 INT_IRQ1
0xE0045038 INT_IRQ2
0xE004503C INT_IRQ3
Table Interrupt-33 Interrupt Factor Registers of Application Processor
Address Register
0xE0045000 INT_CAUSE0
Type Initial
RO -
RO -
RO -
RO -
RW 0x00000000
RW 0x00000000
RW 0x00000000
RW 0x00000000
RW 0x00000000
RW 0x00000000
RW 0x00000000
RW 0x00000000
RO 0x00000000
RO 0x00000000
RO 0x00000000
RO 0x00000000
Bit Field Type
EXDEVICE RO
－113/1010－
Description
Interrupt factor
indicates the status of the interrupt
The initial value of the register depends on that of connected block.
Interrupt enable
When bit value is "1", interrupt is requested to processor (enabled),
and when bit value is "0", interrupt is not requested (disabled).
Inverted polarity
Writing "1" enables to invert the polarity of the interrupt of the
corresponding bit.
Interruption request
means ANDed value between interrupt factor (INT_CAUSE) and
interrupt enable (INT_EN), and indicates the status of signal
actually provided to processor
Bit Initial Description
[31:20] - Interrupt request from external device (from
GPIO)
CXD5602 User Manual