Sony CXD5602 User Manual page 278

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Among these processes, the Startup control is fully implemented in the hardware while the other operations are
implemented in the software of the sequencer controller.
There are 10 independent sequencers within the sequencer, each to which separate startup control and sensor
polling settings are possible.
Figure SCU (Sensor Control Unit)-69 shows the overall processes of the sequencers.
SEQUENCER
10 instruction group
assertion of
Trigger Singal
or
Interrupt
signal
SCU_REG
Figure SCU (Sensor Control Unit)-70 shows an example of the process. The SEQ ID0 operates periodically
according to the timer, and the data from the I2C is captured. The SEQ ID1 starts up by a certain trigger and
captures the data of the LPADC FIFO.
Periodic Access by timer
some kind of trigger
SEQ
startup
generate the
ID0
config.
bus transactions
startup
SEQ
config.
ID1
HW
Resource
I2C BUS Access
Sequencer
IDLE
Status
Figure SCU (Sensor Control Unit)-70 Sequencer Process Flow (Example)
The 10 sequencer requests startup independently. However, afterwards, the sequences are processed one at a
time in order because each process of the external bus transaction generation, external data capture,
MATH_PROC processing, and FIFO writing are executed by the sequencer software.
The normal (excluding the duplication function) data flow is shown below.
SPI Master
I2C Master 0
3 instruction group
request
Generate signal
Configuration
about request
to sequencer
for Startup
completion
notice
Configuration
Configuration
Data
Data
10 configuration
data set
Figure SCU (Sensor Control Unit)-69 Sequencer Overall Image
fetch the
MATH_PROC
Write
external data
processing
FIFO
external data
BUSY
I2C Master 1
LPADC
Read
Sensor
Data
Data formatting
10 configuration
data set
startup
config.
fetch the
Write
FIFO
LPADC
FIFO
IDLE
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CXD5602 User Manual
HPADC0
HPADC1
Data
MATH_PROC
formatting
and
Control
FIFO
Writing to FIFO
Setting
16 configuration
data set
generate the
fetch the
MATH_PROC
bus transactions
external data
processing
I2C BUS Access
BUSY
SCU_FIFO
Write
FIFO
IDLE

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