Sony CXD5602 User Manual page 884

3.11 UART
3.11.1 Overview and Features
The UART of this LSI equips the
It has an independent transmitter and independent receiver built in and allows full-duplex transmission. There is
also a dedicated baud rate generator built in, which enables transmissions of a wide range of baud rates. For
details, refer to the PrimeCell
UART List

UART1 (Power domain: PWD_SYSIOP_SUB)

UART2 (Power domain: PWD_APP_SUB)
Transfer Rate
The maximum baud rate of the UART is determined by the combination of the clock selected as the clock source
(SYSPLL, XOSC, RCOSC, or RTC), the X'tal Oscillator clock, and the voltage mode (High Performance mode/
Low Power mode). The following table shows each combination and the maximum transfer rates.
Clock source
frequency
SYSIOP (ck_ahb_gear,ck_com_gear) M Hz
UART1 baudrate
APP (CK_APP)
UART2 baudrate
Clock source
frequency
SYSIOP (ck_ahb_gear,ck_com_gear) M Hz
UART1 baudrate
APP (CK_APP)
UART2 baudrate
®
PrimeCell UART (PL011)
® UART (PL011) Technical Reference Manual.
Table UART-738 XOSC (26 MHz), High Performance Mode
M Hz
bps
M Hz
bps
Table UART-739 XOSC (26 MHz), Low Power Mode
M Hz
bps
M Hz
bps
－884/1010－
from ARM Limited.
Table
SYSPLL XOSC
195.000 156.000 26.000
48.750 39.000 26.000
1843200 1843200 921600
97.500 156.000 26.000
1843200 1843200 921600
SYSPLL XOSC
195.000 156.000 26.000
32.500 31.200 26.000
1843200 1843200 921600
39.000 39.000 26.000
1843200 1843200 921600
CXD5602 User Manual
RCOSC RTC
8.192 0.032768
8.192 0.032768
460800 1200
8.192 0.032768
460800 1200
RCOSC RTC
8.192 0.032768
8.192 0.032768
460800 1200
8.192 0.032768
460800 1200