Sony CXD5602 User Manual page 179

3.6.5.2.2 WrRegPreCnt(0x04)
31 30 29 28
Reserved
-
15 14 13 12
Rese
Pre
rved
- RW

bit[14:0] : Pre[14:0] (PreCounter Write Value)
This is a value reflected on PreCounter of RTC when Write Request (WrRegReq) is issued, or when RTC
receives External Alarm Flag.
3.6.5.2.3 WrRegReq(0x08)
31 30 29 28
Reserved
-
15 14 13 12
Reserved
-
When you write "1" on WrRegReq.BusyA, this register issues a write request. After the write request is issued,
WrRegPostCnt values and WrRegPreCnt values are reflected on RTC Counter values. (Of RTC Counter 47 bits,
WrRegPostCnt values are reflected on higher 32 bits, and WrRegPreCnt values are reflected on lower 15 bits.)
This register is cleared to "0" after executing the request and becomes possible to issue a request again.
(OffsetReq.BusyA and RdReq.BusyA indicate similar status.)

bit[0] : BusyA (Write Request)
BusyA
0
1
27 26 25 24
11 10 9 8
27 26 25 24
11 10 9 8
Description of Functions
Writing 0: You cannot write "0".
Writing 1: issues Write Request
－179/1010－
23 22 21 20
7 6 5 4
23 22 21 20
7 6 5 4
CXD5602 User Manual
19 18 17 16
3 2 1 0
19 18 17 16
3 2 1 0
Busy
A
RW