Sony CXD5602 User Manual page 979

3.21.12.1.9 {0x240} HPADC_AC0 Details
Clock Control Common to the HPADC
Local Address: 0x240
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Bits Name
31..6 Reserved
5..4 LV_CLK_XOSC_DIV RW
3..1 Reserved
0 LV_CLK_OSC_SEL
Table ADC-789
Type Reset Value Description
RO 0x0000000 Reserved
Division ratio setting port when using the XOSC clock
0: clock divided by 2,
0x0 1: clock divided by 3
2: clock divided by 4
3: clock divided by 6
RO 0x0 Reserved
Clock selection port when performing high speed
sampling
RW 0x0
0: XOSC
1: RCOSC
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CXD5602 User Manual
Register Type: RW (read/write)
Reset Value: 0x00000000