Sony CXD5602 User Manual page 882

3.10.5 SPI5
3.10.5.1 Register List
Table SPI-753 shows a register list of the SPI5.
Address Register Name
0x0E103C00 PrimeCell
|
0x0E103C24
0x0E103C28 Reserved
|
0x0E104FFC
3.10.5.2 Clock and Reset
Figure SPI-99 shows the clock and reset system diagram of the SPI5.
RTC_CLK_IN(32.768kHz)
SYSPLL
1/2
1/3
1/4
1/5
APP_CKSEL.APP_PLL_DIV5
APP_CKSEL.STAT_SP_CLK_SEL4
APP_CKSEL.STAT_APP_CLK_SEL4
APP_CKEN.APP
Table SPI-737 SPI5 Register List
Type Description
®
Synchronous Serial Port (PL022)
RO Reserved
RCOSC
0
1
CK_APP
CK
2
XOSC
GATE
3
0
1
2
3
0
1
GEAR_IMG_WSPI.gear_m_img_wspi
GEAR_IMG_WSPI.gear_n_img_wspi
Figure SPI-99 SPI5 Clock and Reset System
－882/1010－
register
GEAR_AHB.gear_m_ahb
GEAR_AHB.gear_n_ahb
CK_GATE_AHB.ck_gate_img
GEAR_IMG_SPI.gear_m_spi
GEAR_IMG_SPI.gear_n_spi
GEAR_IMG_UART.gear_m_uart
GEAR_IMG_UART.gear_n_uart
RESET.xrs_img
PWD_RESET0.PWD_APP
CXD5602 User Manual
Initial
Value
-
0x0
N/M
CK
GATE
CK
1/M
SSPCLK
GATE
PCLK
nSSPRST
PRESETn
CK
1/M
SSPCLK
GATE
PCLK
nSSPRST
PRESETn
UART2
CK
1/M
UARTCLK
GATE
PCLK
nUARTRST
PRESETn
SPI4
SPI5