Sony CXD5602 User Manual page 812

COPY_ENABLE
Each bit of this parameter can be rewritten when the corresponding sequencer n is in operation.
3.9.13 SCU Control Sequence
The following describes the control sequence. For details on the control, refer to Section 3.9.13.6.
3.9.13.1 Power Supply Startup to Initialization
Power supply startup to initialization is performed by the following procedure.
(1) PWD_SCU power supply On
(2) XOSC power supply On
(3) RCOSC power supply On
(4) LPADC, HPADC power supply On
(5) PWD_SCU reset release
(6) LPADC functional block reset release
(7) HPADC functional block reset release
(8) XOSC, RCOSC clock set
(9) PWD_SCU clock set
(10) SPI clock supply start
(11 )I2C0, I2C1 clock supply start
(12) LPADC clock supply start
(13) HPADC clock supply start
(14) LPADC, HPADC operation enable
(15) Sensor interrupt input terminal set
(16) SPI terminal set
(17) I2C0 terminal set
(18) I2C1 terminal set
(19) LPADC, HPADC terminal set
(20) PWM terminal set
(21) SCU_REG sequencer-related set
(22) Program download to SEQ_IRAM
(23) SEQ_DRAM sequencer-related set
(24) SCU_FIFO initialization
(25) SPI sequencer operation initial value set
(26) I2C0 sequencer operation initial value set
(27) I2C1 sequencer operation initial value set
[0] RW The copy enable flag of the write partition of sequencer n
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CXD5602 User Manual