Sony CXD5602 User Manual page 34

BitBLT, Rotate, Scaling, Blender
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Connectivity/Storage Interface
On-chip USB2.0 Device supported
eMMC 4.41 for eMMC Device
SD3.0 Host Controller interface
SPI and SDIO support for external Wi-Fi transceivers
UART support for external Bluetooth transceivers
Quad SPI-FLASH Interface
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Display Interface
SPI Interface up to 40.96 Mbps
8/16/24/32 bpp LCD or E-Ink recommend up to QVGA resolution

System and I/O Processor (SYSCPU)
® ®
Arm Cortex -M0+ 32 bit RISC
Operating frequency up to 100 MHz at 1.0 V
256 KByte SRAM
128 KByte ROM for secure booting

System and IOP Domain multi-layer bus
32 bit Multi-layer bus architecture
SYSIOP for Arm
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Power management
I2C and GPIO interface connections to Power Management IC (assuming CXD5247GF)
power on reset
power gate control
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Clock and Reset management
X'tal, RTC, RCOSC, PLL

64 KByte Backup SRAM
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Timer
RTC
A general-purpose 32 bit timer each Processor Unit
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Host Interface
I2C, SPI or UART interface
1 KByte Host communication Memory
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Sensor engine
SPI and Two I2C Interfaces
40 KByte Sensory Data FIFO
Pre-processing unit for sensor fusion
Up to Four PWMs
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ADCs
Four channel 10 bit low power ADC
® ®
Cortex -M0+ 32 bit RISC, PMU, GNSS, Sensor engine, HostIF, Configurable IO
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CXD5602 User Manual