Sony CXD5602 User Manual page 944

0x041004E0 CKDIV_HOS
TIFC
0x04100518 GEAR_STAT
CK_COM RW [4:0]
Reserved RO [31:5]
CK_HOS RW [4:0]
TIFC
Reserved RO [31:3]
SFC_STA RO [2]
T
AHB_ST RO [1]
AT
－944/1010－
0
Indicated as DIV(4) in
Reset Control-116
Frequency division setting (ratio against ck_cpu_bus)
of SYSIOP_SUB communication system
0: divided by 1
1: divided by 2
2: divided by 3
...
29: divided by 30
30: divided by 31
31: divided by 32
0 Reserved
0
Indicated as DIV(5) in
Reset Control-116
HOSTIFC frequency switching setting
0: divided by 1
1: divided by 2
...
30: divided by 31
31: divided by 32
0 Reserved
0
Indicated as DIV(3) in
Reset Control-116
Update
CKDIV_CPU_DSP_BUS.SFC_HCLK_LOW
setting value
0: Update completed
1: Update in progress
0
Indicated as DIV(1) in
Reset Control-116
Update
CKDIV_CPU_DSP_BUS.CK_AHB setting value
0: Update completed
1: Update in progress
CXD5602 User Manual
Figure SYSIOP Clock and
Figure SYSIOP Clock and
Figure SYSIOP Clock and
status
Figure SYSIOP Clock and
status
of
of