Sony CXD5602 User Manual page 65

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3.1.4.2.3
IOCELL Control Register
These registers set IOCELL of each I/O pin. Table I/O Configuration-14 shows overview of registers. Figure I/O
Configuration-8 shows a visualized function inside IOCELL controlled by the parameter that is set by IOCELL
control register. And Table I/O Configuration-15Table I/O Configuration-15 Correspondence Table of IOCELL
Control Registers and Controllable I/O Pinsshows correspondence table of registers and I/O pins.
Table I/O Configuration-14 Overview of Registers to Select Function of IOCELL
Address
Register
Name
0x04100800
IO_*
|
(1*)
0x041009A4
(1*)
:For pin names corresponding to registers, refer to
The following IOCELL control registers are different from those listed above.
IO_DBG_SWO_CLK.ENZI is reserved.
O_DBG_SWO.ENZI is reserved.
IO_RTC_CLK_IN.LOWEMI is reserved.
The initial value of IO_SPI1_CS_X.LOWEMI is "0".
The initial value of IO_SPI1_SCK.LOWEMI is "0".
The initial value of IO_SPI1_IO0.LOWEMI is "0".
The initial value of IO_SPI1_IO1.LOWEMI is "0".
The initial value of IO_SPI1_IO2.LOWEMI is "0".
The initial value of IO_SPI1_IO3.LOWEMI is "0".
The initial value of IO_DBG_SWOCLK.LOWEMI is "0".
Bit Field
Type
Bit
Name
Reserved
-
[31:25]
LOWEMI
RW
[24]
Reserved
-
[23:17]
PDN
RW
[16]
Reserved
-
[15:9]
PUN
RW
[8]
Reserved
-
[7:1]
ENZI
RW
[0]
Table I/O Configuration-15
-65/1010-
Initial
Description
Value
-
-
1
Output Current Control 0: 4mA(Max64MHz), 1:
2mA(Max32MHz)
-
-
1
Pulldown Control 0: Pulldown, 1: Normal
-
-
1
Pullup Control 0: Pullup, 1: Normal
-
-
0
Input Enable Control 0: Input Disable, 1: Input Enable
.
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