Sony CXD5602 User Manual page 201

3.6.5.2.31 CntUpdateClr(0xB0)
31 30 29 28
Reserved
-
15 14 13 12
Reserved
-
When RTC Counter has been updated completely, the interrupt flag notifying that RTC Counter has been updated
is asserted (set). If Clear Register is written, the interrupt flag can be deasserted (reset) instantly.
As for conditions that the interrupt flag notifying that RTC Counter has been updated is asserted, refer to
CntUpdateFlg(0xB8)

bit[0] : Flg (Clear of the interrupt flag notifying that RTC Counter has been updated)
When you write "1" on CntUpdateClr.Flg, the interrupt flag notifying that RTC Counter has been updated
is deasserted and cleared to "0".
Flg
0
1
3.6.5.2.32 CntUpdateEn(0xB4)
31 30 29 28
Reserved
-
15 14 13 12
Reserved
-

bit[0] : En (Enable Signal for the interrupt flag notifying that RTC Counter has been updated)
This register does the settings for notifying processor that RTC Counter has been updated.
En
0
1
27 26 25 24
11 10 9 8
Description of Functions
Writing 0: invalid
Writing 1: deasserts interrupt flag notifying that RTC Counter has been updated
27 26 25 24
11 10 9 8
Description of Functions
Writing 0: disables an interrupt request to processor.
Writing 1: enables an interrupt request to processor.
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23 22 21 20
7 6 5 4
23 22 21 20
7 6 5 4
CXD5602 User Manual
19 18 17 16
3 2 1 0
Flg
WO
19 18 17 16
3 2 1 0
En
RW