Sony CXD5602 User Manual page 888

CXD5602 User Manual
3.11.3.3.2 Clock Supply Stop
Perform the following control to stop supplying the UARTCLK clock and PCLK clock to the UART2.
1. UART2 control clock stop
GEAR_IMG_UART.gear_n_uart=1'b0
2. UART2 register's clock stop
CK_GATE_AHB.ck_gate_img=1'b0
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