Sony CXD5602 User Manual page 821

Sequencer Clock TOPREG
Stop
CRG Interrupt ---
Wait
Interrupt TOPREG
Confirmation
Interrupt Clear TOPREG
Reset Release TOPREG
Interrupt Mask TOPREG
Clock Supply TOPREG
CRG Interrupt ---
Wait
Interrupt TOPREG
Confirmation
Interrupt Clear TOPREG
FIFO Partition SCU.FIF
Setting O_REG
SPI Initial Setting SCU.SPI
I2C0 Initial SCU.I2C0
Settings
I2C1 Initial SCU.I2C1
Settings
0x071C [4] SCU_REQ
--- --- ---
0x04F4 [21:0] STAT
0x04EC [21:0] CLR
0x0704 [7] XRST_SCU
_ISOP
0x04F0 [21:0] MSK
0x071C [4] SCU_REQ
--- --- ---
0x04F4 [21:0] STAT
0x04EC [21:0] CLR
--- --- ---
--- --- ---
--- --- ---
--- --- ---
－821/1010－
1'b0 PWD_SCU sequencer clock enable
(CK_SCU_SEQ)
--- Waits for the clock enable completion
interrupt
Generator (CRG)
(&= Interrupt confirmation: Confirms that
22'h002000) ! the following bit turns to "1"
= 0 [13]: CK_SCU_SEQ On/Off
|= 22'h002000 Sets the following bit to "1"
RMW (OR)
[13]: CK_SCU_SEQ On/Off
1'b1
&= Sets the following bit to "0"
22'h3FDFFF RMW (AND)
[13]: CK_SCU_SEQ On/Off
1'b1 PWD_SCU sequencer clock enable
(CK_SCU_SEQ)
--- Waits for the clock enable completion
interrupt from the CRG
(&= Interrupt confirmation: confirms that the
22'h002000) following bit turns to "1"
!= 0 [13]: CK_SCU_SEQ On/Off
|= 22'h002000 Sets the following bit to "1"
RMW (OR)
[13]: CK_SCU_SEQ On/Off
---
Refer to
Control Unit)-721
(Sensor Control Unit)-722
SCU (Sensor Control Unit)-723
Table SCU
Unit)-724
--- Refer to the SPI (3.10) Chapter
--- Refer to the I2C (3.7) Chapter
--- Refer to the I2C (3.7) Chapter
CXD5602 User Manual
from the Clock Reset
Table SCU (Sensor
Table SCU
,
Table
,
,
(Sensor Control