Sony CXD5602 User Manual page 946

3.14.3.5.2 Register Descriptions
Table SYSIOP Clock and Reset Control-808 shows the clock enable status registers. Make sure to use the RW
registers as RO registers.
Table SYSIOP Clock and Reset Control-768 Clock Enable Status Registers
Address Register Name
0x04100714 SYSIOP_CKEN
Bit Field Name Type
Reserved RW
HOSSPI RW
HOSI2C RW
HOSTIFC_SEQ RW
BRG_SCU RW
SYSIOP_RTC RW
RCOSC_OUT RW
－946/1010－
Bit Initial Description
Value
[31:18] 0 Reserved
[17] 0
Indicated as CG(SYS17) in
SYSIOP
Control-116
Clock enable for SPI2
[16] 0
Indicated as CG(SYS16) in
SYSIOP
Control-116
Clock enable for I2C3
[15] 0
Indicated as CG(SYS15) in
SYSIOP
Control-116
Clock enable for HOSTIFC processor
[14] 0
Indicated as CG(SYS14) in
SYSIOP
Control-116
Clock enable for AHB-APB bridge
between PWD_SYSIOP and PWD_SCU
[13] 1
Indicated as CG(SYS13) in
SYSIOP
Control-116
Clock enable for RTC1 and APB
[12] 0
Indicated as CG(SYS12) in
SYSIOP
Control-116
Clock
(RCOSC) of FREQDISC
CXD5602 User Manual
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
enable for reference clock