Sony CXD5602 User Manual page 945

3.14.3.5 Clock Enable Confirmation
3.14.3.5.1 Function Details
Using the API, supply/stop control of the clocks supplied to each block can be performed.
CPU_ST RO [0]
AT
－945/1010－
0
Indicated as DIV(0) in
Reset Control-116
Update status of CKDIV_CPU_DSP_BUS.CK_M0
setting value
0: Update completed
1: Update in progress
CXD5602 User Manual
Figure SYSIOP Clock and