Exception Processing; Reserved Instruction Exception (Rie) - Mitsubishi Electric M32R Series User Manual

Mitsubishi 32-bit risc single-chip microcomputers
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4

4.8 Exception Processing

4.8.1 Reserved Instruction Exception (RIE)

[Occurrence Conditions]
Reserved Instruction Exception (RIE) is generated when execution of a reserved instruction
(unimplemented instruction) is detected. Instruction check is performed on the op-code part of
the instruction.
When a reserved instruction exception occurs, the instruction which generated it is not executed.
If an external interrupt is requested at the same time a reserved instruction exception is detected,
it is the reserved instruction exception that is accepted.
[EIT Processing]
(1) Saving SM, IE, and C bits
The SM, IE, and C bits of the PSW register are saved to their backup bits – the BSM, BIE,
and BC bits.
BSM
BIE
BC
(2) Updating SM, IE, and C bits
The SM, IE, and C bits of the PSW register are updated as shown below.
SM
BIE
BC
(3) Saving PC
The PC value of the instruction that generated the reserved instruction exception is set in
the BPC register. For example, if the instruction that generated the reserved instruction
exception is at address 4, the value 4 is set in the BPC register. Similarly, if the instruction
is at address 6, the value 6 is set in the BPC register. In this case, the value of the BPC
register bit 30 indicates whether the instruction that generated the reserved instruction
exception resides on a word boundary (BPC[30] = 0) or not on a word boundary (BPC[30]
= 1).
However, in either case of the above, the address to which the "RTE" instruction returns
after completion of processing by the EIT handler is address 4. (This is because the two
low-order bits are cleared to "00" when returning to the PC.)
← SM
← IE
← C
← Unchanged
← 0
← 0
4-11
4.8 Exception Processing
Ver.0.10
EIT

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